Correct option is A
When the input terminal of the NOT gate is at 0 V, it is termed as logic 0. A NOT gate in digital logic operates such that a 0 input (0 V) gives a 1 output, and a 1 input (usually represented by 5 V) gives a 0 output.
When the input terminal of the NOT gate is at 0 V, it is termed as logic 0. A NOT gate in digital logic operates such that a 0 input (0 V) gives a 1 output, and a 1 input (usually represented by 5 V) gives a 0 output.
In a Gray Code to Binary converter, how is the Most Significant Bit (MSB) of the Binary code determined?
Which Boolean law is represented by the equation A.(B+C)=(A.B)+(A.C) ?
Which of the following is a primary advantage of using a Mealy machine over a Moore machine in FSM design?
How does the triggering mechanism differ between a latch and a flip-flop in digital circuits?
Which type of Sample and Hold Circuit is specifically designed for applications like analog-todigital converters (ADCs), where precise timing is critical for accurate signal processing?
Which of the following best describes a situation where a bidirectional shift register would be preferred over a unidirectional shift register in a digital system?
Which of the following steps is essential in minimizing a Boolean function using a Karnaugh Map (K-Map)?
Which type of memory is best suited for digital electronics applications where high storage capacity is required at a low cost?
Which controller is specially developed for interfacing keyboard and display devices for the Intel 8085?
What term refers to the duration a microprocessor takes to access memory or I/O devices and complete the associated read or write operation during processing?