Correct option is B
In a JK Flip-Flop (FF), when the inputs are both high (J = K = 1), the flip-flop toggles its output on every clock pulse. However, if the flip-flop toggles more than once in a single clock cycle due to a timing issue or improper signal synchronization, this is referred to as racing. This issue occurs when the timing of the signals causes multiple changes in the output within a single clock cycle, leading to unpredictable behavior.
Characteristic equation of J-K flip flop-