Which of the following are logically equivalent?
A. ¬p → (q → r) and q → (p ∨ r)
B. (p → q) → r and p → (q → r)
C. (p → q) → (r → s) and (p → r) → (q → s)
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Consider the Boolean expression A(x, y, z) = x (y'z)’. Which of the following is the complete sum-of-products form of the given Boolean expression?

The characteristics of the combinational circuits are:
A. Output at any time is function of inputs at that time
B. Contains memory elements
C. Do not have feedback paths
D. Clock is used to trigger the circuits to obtain outputs
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Which of the following are logically equivalent?
A. ¬p → (q → r) and q → (p ∨ r)
B. (p → q) → r and p → (q → r)
C. (p → q) → (r → s) and (p → r) → (q → s)
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Which of the following statements are true?
A. Frequency division multiplexing technique can be handled by digital circuits.
B. Time division multiplexing technique can be handled by analog circuits.
C. Wavelength division multiplexing technique is used with optical fiber for combining two signals.
D. Frequency division multiplexing technique can be applied when the bandwidth of a link is greater than the bandwidth of the signals to be transmitted.
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A digital computer has a common bus system for 8 registers of 16 bits each. How many multiplexers are required to implement the common bus? What size of multiplexers is required?

Consider the following statement regarding special purpose registers.
A. Program Counter (PC) keeps the track of next instruction executed
B. Instruction register holds the address of first instruction to be executed 
C. Accumulator holds the output of ALU
D. Program Counter (PC) keeps the track of only first instruction of the program
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Match List-I with List-II.

List –I (Counter)	List – II (Uses/working)
A.	N-bit Ring Counter	I.	Uses universal clock
B.	Synchronous Counter	II.	Counts exactly N states
C.	Asynchronous Counter	III.	Counts 0 to 9
D.	Decimal Counter	IV.	Main clock is applied to first flip-flop only

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Match List - I with List – II.

List - I (Computing systems)	List - II (Working/output)
A.	Half Adder	I.	Has n input and 2n output
B.	Decoder	II.	CPU Storage Unit
C.	Register	III.	Used to store program at runtime
D.	Main memory	IV.	2-bit addition circuit

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